About the company
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
Job Summary
RESPONSIBILITIES:
đź“ŤOwn the high quality release of the Memory Controller IP for SpaceX SoC designs, including triaging release/integration issues into IP defects and addressing issues đź“ŤResponsible for Memory Controller/PHY IP core development and integration đź“ŤResponsible for RTL design, synthesis, timing constraints, power estimation, and timing analysis using industry-leading CAD tools in the latest generation process technologies đź“ŤCollaborate with chip architects, software engineers, and other subsystem owners to develop high performance Memory controller/PHY solutions đź“ŤWrite detailed design specifications and test plans in close collaboration with architecture, package and verification engineers đź“ŤSupport silicon bring-up, performance, and power characterization for memory subsystems đź“ŤDrive functional verification including test plan reviews, and functional and code coverage as well as timing closure for your designs
BASIC QUALIFICATIONS:
đź“ŤBS in Electrical Engineering, Computer Engineering, or Computer Science đź“Ť8+ years of experience working with ASICs and the VLSI design flow đź“ŤExperience in RTL development and verification using Verilog and/or SystemVerilog
